搜索资源列表
suAra6Rm
- fir滤波器的Verilog程序,看看吧，还不错！
cordic
- CIC滤波器源码，有VERILOG写的，非常有用哦
cic3s32
- 阶的32倍抽取cic滤波器verilog代码
cic_4_dec
- 实现4倍抽取的CIC抽取滤波器模块的Verilog实现，在对数据进行抽取之前，首先进行滤波
chengxing1
- 成型滤波器的verilog代码--Verilog source code for formatted wave filter.
filter
- 基于verilog硬件描述语言的滤波器设计，便于开发者从理论到实现-Verilog hardware descr iption language based on the filter design, ease of developers from theory to implementation
CIC.rar
- CIC梳状滤波器verilog源码，包括积分器，下抽级以及梳状滤波器三个部分。,CIC comb filter verilog source code, including the integrator, under the pump, as well as comb filter class is in three parts.
baseband_verilog.rar
- verilog实现的基带信号编码，整个系统分为六个模块，分别为：时钟模块,待发射模块,卷积模块,扩频模块,极性变换和内插模块,成型滤波器,verilog implementation baseband signal coding, the entire system is divided into six modules, namely: the clock module, to be launched modules, convolution module, spread spectrum m
ourdev_573514
- 高通滤波器的verilog实现，对初学者设计FIR有好处，分布式算法-Verilog implementation of high-pass filter, FIR design is good for beginners, distributed algorithm
verilogFIR
- 本源码为Verilog的FIR数字滤波器 测试后性能很不错的-The source of the FIR digital filter for the Verilog test performance is very good
crc_interp_2_single
- 单级cic数字积分梳妆滤波器实现，格式.v代码，verilog语言编程-Single-stage CIC filter dressing integral digital format. V code, verilog language programming
cic3_decimator
- 用Verilog语言实现积分梳状滤波器(CIC)设计-Achieve integration with Verilog language comb filter (CIC) design
base_fir
- 使用verilog 写的FIR滤波器，里面并有matlab程序，是从altera官网下来的。。希望对大家游泳。-Use verilog to write the FIR filter, which have matlab and procedures, are down from the official website of the altera. . Everyone would like to swim.
11_FIR
- 11阶滤波器的verilog编程语言，可很好的实现滤波功能。-11-order filter verilog programming language, can achieve very good filtering.
xugc
- cic512 5阶cic滤波器，抽取12倍，的verilog程序，已经通过仿真验证 -5CIC
fir
- 用verilog实现fir滤波器,实现了一个8阶的fir滤波器-design the fir filter use verilog lanuage
HBWDCF0428
- 11阶滤波器的verilog基本代码描述-verilog code of 11-tap filter
fir8
- 用verilog编写的8阶串行fir滤波器-verilog vhdl fir
da_fir
- 分布式FIR程序Verilog语言，数字滤波器设计-DAfir
fir
- 利用Verilog语言编写的FPGA作为数字fir滤波器的程序，在编译器中调试通过，可以作为模块调用。-the model of fir digital cr which is written of verilog language.